Method for detecting alignment mark shielding

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S401000, C257SE21521

Reexamination Certificate

active

10944844

ABSTRACT:
A method of testing a test wafer includes shielding test centers on a test wafer using shielding tabs during the deposition of a layer. The test wafer has the same size and shape of product wafers. The shielding tabs are then removed from the test wafer. A plurality of predetermined points which are separated from each test center by a critical interval are checked, and whether each point is covered by the layer is determined through an interferometer or a microprobe. The test wafer is processed after adjustments to or maintenance on equipment, or after a fixed number of product wafers have been processed.

REFERENCES:
patent: 4958082 (1990-09-01), Makinouchi et al.
patent: 5320728 (1994-06-01), Tepman et al.
patent: 5456756 (1995-10-01), Ramaswami et al.
patent: 5614446 (1997-03-01), Chan et al.
patent: 6277658 (2001-08-01), Jeng et al.
patent: 6492269 (2002-12-01), Liu et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for detecting alignment mark shielding does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for detecting alignment mark shielding, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for detecting alignment mark shielding will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3803337

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.