Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2006-02-28
2006-02-28
Whitmore, Stacy A. (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S775000, C438S637000
Reexamination Certificate
active
07005746
ABSTRACT:
First, an amount of a current flowing between a first wiring and a third wiring is estimated, and the number of stack vias required for connecting the first wiring and the third wiring is determined. Next, based on the number of stack vias, the number of virtual wirings for determining positions of the stack vias is determined. Thereafter, the virtual wirings are arranged in a forming region of the third wiring above the first wiring, for example, at an equal interval, and the stack vias are created in intersections of the first wiring and the virtual wirings. Thereafter, the virtual wirings are removed, and the third wiring is created. According to needs, a second wiring passing between the stack vias is created.
REFERENCES:
patent: 4889832 (1989-12-01), Chatterjee
patent: 5532516 (1996-07-01), Pasch et al.
patent: 5691572 (1997-11-01), Chung
patent: 5721453 (1998-02-01), Imai et al.
patent: 5877091 (1999-03-01), Kawakami
patent: 5939789 (1999-08-01), Kawai et al.
patent: 6016000 (2000-01-01), Moslehi
patent: 6202191 (2001-03-01), Filippi et al.
patent: 6392299 (2002-05-01), Gayet
patent: 6417572 (2002-07-01), Chidambarrao et al.
patent: 6441418 (2002-08-01), Shields et al.
patent: 6441494 (2002-08-01), Huang et al.
patent: 6448173 (2002-09-01), Clevenger et al.
patent: 6528888 (2003-03-01), Cho et al.
patent: 6551856 (2003-04-01), Lee
patent: 6590290 (2003-07-01), Cronin et al.
patent: 6590291 (2003-07-01), Akagawa
patent: 6627926 (2003-09-01), Hartswick et al.
patent: 6664639 (2003-12-01), Cleeves
patent: 6664641 (2003-12-01), Ohsaki et al.
patent: 2001/0027010 (2001-10-01), Jang et al.
patent: 07-045745 (1995-02-01), None
patent: 10-321623 (1998-12-01), None
Office Communication from the Patent Office of the People's Republic of China dated Apr. 30, 2004 in Application No. 02105977.2 with English language translation.
Fujitsu Limited
Westerman Hattori Daniels & Adrian LLP
Whitmore Stacy A.
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