Method for designing integrated circuit incorporating memory...

Details Method for designing integrated circuit incorporating memory... Method for designing integrated circuit incorporating memory...

2011-07-26

2011-07-26

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189020, C365S230020

Reexamination Certificate

active

07986583

ABSTRACT:
An integrated circuit design method whereby memory instances are assigned to memory macros integrated within an integrated circuit. A plurality of memory instances operating at the same operation frequency are assigned to a single memory macro. A frequency multiplier which receives a first clock signal is arranged to generate a second clock signal through frequency multiplication of the first clock signal, and feeds the second clock signal to the plurality of memory instances. A control circuit which selects the memory instances in synchronization is arranged with the first clock signal.

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patent: 5568437 (1996-10-01), Jamal
patent: 6058056 (2000-05-01), Beffa et al.
patent: 6536004 (2003-03-01), Pierce et al.
patent: 7-84987 (1995-03-01), None
patent: 2005-85344 (2005-03-01), None

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