Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2009-06-09
2011-12-27
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S100000, C716S122000, C257S355000, C257S361000, C438S286000
Reexamination Certificate
active
08086979
ABSTRACT:
A PMOS device can be designed and manufactured in accordance with the invention to locate its drain junction breakdown point and maximum impact ionization point to reduce or eliminate drain breakdown voltage walk-in. In some embodiments, the drain junction breakdown point and maximum impact ionization point are located sufficiently far from the gate that the device exhibits no significant drain breakdown voltage walk-in. The device can be a high voltage power transistor having an extended drain region including a P-type lightly doped drain (P-LDD) implant, with drain junction breakdown and maximum impact ionization points appropriately located by controlling the implant dose employed to produce the P-LDD implant. Other aspects of the invention are methods for designing a PMOS device including by determining relative locations of the gate and at least one of the drain junction breakdown and maximum impact ionization points to reduce drain breakdown voltage walk-in, and methods for manufacturing integrated circuits including any embodiment of the PMOS device of the invention.
REFERENCES:
patent: 5306652 (1994-04-01), Kwon et al.
patent: 2003/0011039 (2003-01-01), Ahlers et al.
patent: 2003/0122195 (2003-07-01), Tada et al.
patent: 2004/0173859 (2004-09-01), Hao et al.
D. Brisbin, A. Strachan, and P. Chaparala, “Breakdown Walk-in: A New PMOS Failure Mode in High Power BiCMOS Applications,” presented at the IEEE 2003 International Integrated Reliability Workshop, at S. Lake Tahoe, California, on Oct. 22, 2003, and published in the 2003 IEEE International Integrated Reliability Workshop Final Report (Feb. 2004) (four pages).
Brisbin Douglas
Strachan Andrew
Girard & Equitz LLP
National Semiconductor Corp.
Siek Vuthe
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