Method for depositing an n+ amorphous silicon layer onto contami

Details Method for depositing an n+ amorphous silicon layer onto contami Method for depositing an n+ amorphous silicon layer onto contami

1987-09-29

1989-06-27

Morgenstern, Norman

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

427402, B05D 306, B05D 136

Patent

active

048428922

ABSTRACT:
A method of depositing a delamination bubble-free PECVD thin film n+ amorphous silicon layer, from the decomposition of a gaseous mixture of silane and phosphine, upon a substrate having one or more thin film layers thereon, wherein there is contamination upon the exposed surface of the outer thin film layer, comprising purging the plasma chamber with pure silane gas, igniting the plasma and then introducing the gaseous mixture of silane and phosphine into the plasma chamber to complete the formation of the n+ layer.

REFERENCES:
patent: 4485125 (1984-11-01), Izu et al.
patent: 4582721 (1986-04-01), Yoshino et al.
patent: 4634601 (1987-01-01), Hamakawa et al.
patent: 4705913 (1987-11-01), Campbell, III
patent: 4743750 (1988-05-01), Komatsu et al.

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