Method for depositing an insulating interlayer in a semiconducto

Fishing – trapping – and vermin destroying

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437231, 437241, 437978, H01L 2128, H01L 21318

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054139635

ABSTRACT:
A method of forming a metallurgy system on a semiconductor substrate is provided. A first conformal layer of SiO.sub.2 is deposited on the substrate using plasma enhanced chemical vapor deposition (PECVD) techniques. Subsequently a non-conformal organic layer is deposited by spin-on-glass (SOG) techniques over the first layer, and heated to smoothen the surface. The organic SOG deposited layer is then subjected to a N.sub.2 plasma environment and a second conformal layer of SiO.sub.2 is deposited, and then vias etched through the layers. The resist layer used to define vias is removed by an O.sub.2 plasma and the device metallurgy completed.

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Daniel L. W. Yen, et al., "Process Integration With Spin-On-Glass Sandwich . . . ", Jun. 13-14, 1988 VMIC Conference, pp. 85-94.
N. Rutherford, et al., "A New Low Dielectric Constant Planarization . . . ", Jun. 11-12, 1991 VMIC Conference, pp. 448-450.
Hsu, S., et al., "Field Inversion Generated in the CMOS . . . ", IEEE Trans. Elec. Devices, vol. 40, No. 1, Jan. 1993, pp. 49-53.
"An Advanced Interlayer Dielectric System With Partially Converted Organic SOG by Using Plasma Treatment", by Malsuwia et al, 1003 VMIC Conference, 1993 ISMIC-102/93/0113, Jun., 8-9, 1993 VMIC Conference.

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