Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Having diverse electrical device
Reexamination Certificate
2002-08-15
2004-02-10
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Having diverse electrical device
C438S034000, C438S613000
Reexamination Certificate
active
06689628
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention.
The present invention relates to optical systems and more particularly to optical modulators having a semiconductor material in the modulating structure.
2. Brief Description of Prior Developments.
Much work has been done recently on a wide range of opto-electronic devices based on the electric-field dependence of strong absorption resonances in semiconductor quantum wells (QWs). These devices typically manipulate light having photon energies near the bandgaps of the quantum wells, corresponding to wavelengths around 1000 nanometers (nm) for gallium arsenide (GaAs) and low-indium-concentration InGaAs.
In a QW, a layer of one semiconductor material is sandwiched between cladding layers of a different material, with the electronic properties of the materials being such that an electric potential well (in the central layer) is formed between two electric potential barriers (in the cladding layers). The QW's small thickness, on the order of 100 angstroms, results in a quantization of charge-carrier motion in the thickness direction that leads to a formation of electron and hold sub-bands in the conduction and valence bands, respectively.
The efficiency of such opto-electronic devices may be increased by increasing the number of addressable pixels on the semiconductor material. There is, therefore, a need for a fabrication technique that increases the number of available addressable pixels by requiring a smaller contact and the indium bumps used to address the pixels.
SUMMARY OF THE INVENTION
The present invention is a method of fabricating a dense pixel array. First, pixel size is defined by printing a photoresist mask and applying this mask to a semiconductor material substrate to form a mask area and an unmask area on the substrate. Then a photoresist material layer is applied to the unmasked area of the substrate. A metal layer is applied over the photoresist layer and substrate. A solvent is then applied to remove the photoresist material layer and the metal layer applied over the photoresist material resist layer. A plurality of metal layers are then superimposed over the unmasked area of the substrate is then left. The substrate is then removed of a depressed substrate surface between the metal layers to form a plurality of pixels each having an upper metal layer. An insulative layer is then superimposed over each of the metal layers. A hole is then formed in at least one of the insulative layers so as to expose the metal layer under the insulative layer. A metal feature is then superimposed over the insulative layers on the pixels and is electrically connected to metal feature of the metal layers super imposed over one of the pixels over which the metallic feature is superimposed.
Also encompassed within the present invention is an opto-electronic device which includes a base semiconductor substrate. A plurality of semiconductor pixels extend upwardly from the base semiconductor substrate and each of these pixels has an upper metallic layer. An insulative layer is superimposed over the upper metallic layers on the pixels. A metallic feature is superimposed over at least two of the pixels. A via hole extends through the insulated layer to expose one of these metallic features. A conductive material connects these metallic features and the upper metallic layer exposed by the via hole.
REFERENCES:
patent: 5488504 (1996-01-01), Worchesky et al.
patent: 5760398 (1998-06-01), Blackwell et al.
patent: 6030700 (2000-02-01), Forrest et al.
patent: 6157042 (2000-12-01), Dodd
patent: 6201242 (2001-03-01), Eden et al.
Bae Systems Information and Electronic Systems Integration Inc.
Long Daniel J.
Tsai Jey
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