Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2006-08-22
2006-08-22
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C716S030000
Reexamination Certificate
active
07096138
ABSTRACT:
In order to test whether a given signal of a complex circuit has the correct behavior, a method is provided which makes it possible to obtain in a computer memory a profile of states of other signals. In order to minimize the processing time and the memory space required to obtain this profile, the method uses two binary decision diagrams starting with a binary variable of said one signal, each with two binary decision subdiagrams. The method combines the binary decision subdiagrams so that the given signal is in a first state when the binary variable is at a first value and is not in this first logical state when the binary variable is at a second value.
REFERENCES:
patent: 5572535 (1996-11-01), Pixley et al.
Akers, Sheldon B. “Binary Decision Diagrams”, Jun. 1978 IEEE Transactions on Computers vol. C-27, No. 6, pp. 509-516.
Madre et al. “The Formal Verification Chain at Bull”, May 29-Jun. 1, 1990 Euro ASIC '90, pp. 474-479.
Lee et al. “Fast Parallel Algorithms for Model Checking Using BDDs”, Apr. 13-16, 1993., Proceedings of Seventh International Parallel Processing Symposium. pp. 444-448.
Stanion, T., “Tsunami: A Path Oriented Scheme for Algebraic Test Generation”, International Symposium on Fault Tolerant Computing Systems, (FTCS), U.S., Los Alamitos, IEEE Comp. Soc. Press, vol. SYMP. 21, Jun. 25, 1991, pp. 36-43, XP000242690, ISBN: 0-8186-2150-8, the entire document.
Fummi, F., et al., “A Complete Testing Stragtegy Based on Interacting and Hierarchical FSM's”, Integration, The VSLI Journal, NL, North-Holland Publishing Company, Amsterdam, vol. 23, No. 1, Oct. 1, 1997, pp. 75-93, XP004100336, ISSN: 0167-9260, the entire document.
Bryant, R.E., “Binary Decision Diagrams and Beyond: Enabling Technologies for Formal Verification”, IEEE/ACM International Conference on Computer-Aided Design, U.S., Los Alamitos, IEEE Comp. Soc. Press, Nov. 5, 1995, pp. 236-243, XP000620913, ISBN: 0-8186-7213-7, the entire document.
Hojati, R., et al., “Early Quantification and Partitioned Transition Relations”, Proceedings of the International Conference on Computer Design, ICCD, VLSI In Computers and Processors, U.S., Los Alamitos, IEEE Comp. Soc. Press, Oct. 7, 1996, pp. 12-19, XP000729882, ISBN: 0-8186-7554-3, the entire document.
Akli Florence
Debreil Alain
Niquet Christian
Barbee Manuel L.
Bull S.A.
Hoff Marc S.
Kondracki Edward J.
Miles & Stockbridge P.C.
LandOfFree
Method for demonstrating the dependence of a signal based on... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for demonstrating the dependence of a signal based on..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for demonstrating the dependence of a signal based on... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3646625