Method for defining and using a timing model for an electronic c

Details Method for defining and using a timing model for an electronic c Method for defining and using a timing model for an electronic c

1994-01-24

1995-09-19

Teska, Kevin J.

Boots, shoes, and leggings

364489, 364578, G06F 1750

Patent

active

054522250

ABSTRACT:
A computer implemented method that first simulates the electronic circuit of each cell type within a circuit cell library using combinations of input transition time and load capacitances. The method reduces the results of the simulation to one of several models for the cell type. The method then reads an actual circuit description of the electronic circuit, and applies the models to the actual cells used in the circuit to determine signal delay through the circuit.

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patent: 5305229 (1994-04-01), Dhar

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