1997-06-27
1999-06-29
Lall, Parshotam S.
395392, 395391, 395390, 395381, 395386, 395393, G06F 938, G06F 9312, G06F 9315
Patent
active
059180340
ABSTRACT:
The present invention solves the problems associated with the prior art by decoupling the issuing of instructions from their dispatch into their respective pipeline. This permits the determination of whether a particular instruction can safely be issued from an instruction queue to the next stage of the pipeline by providing such information at a point early in the machine cycle. In a multistage pipeline, a first stage is bypassed to provide instructions to a second stage regardless of the ability of the first stage to store the instruction from the instruction issuing unit.
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patent: 5640588 (1997-06-01), Vegesna et al.
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Lall Parshotam S.
Sun Microsystems Inc.
Thomson William D.
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