Method for deciding the feasibility of logic circuit prior to pe

Details Method for deciding the feasibility of logic circuit prior to pe Method for deciding the feasibility of logic circuit prior to pe

1996-06-20

1998-09-01

Teska, Kevin J.

Boots, shoes, and leggings

364489, 364578, 371 221, 371 222, 371 2236, 324500, G06F 1750

Patent

active

058019561

ABSTRACT:
A logic circuit design procedure comprises a step of deciding the feasibility of hardware after HDL description and functional verification, and a step of performing logic synthesis of the HDL description which has been determined to be feasible. The feasibility decision step comprises at least a decision on the possibility of spike transfer and a decision on oscillation. The spike transfer check step determines whether at least one of a clock signal and a reset signal of any sequential circuit is output from a combinational circuit. The oscillation check step determines whether an output signal of any combinational circuit is recursively input thereto without passing through a sequential circuit. Only the HDL description which passes the feasibility test is allowed to enter the logic synthesis stage.

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