Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2000-09-06
2003-09-02
Vo, Peter (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S825000, C029S830000, C029S842000, C029S846000, C029S852000, C029S853000, C174S250000, C174S260000, C174S262000, C174S254000, C174S264000, C174S266000, C228S215000, C228S248100, C438S612000
Reexamination Certificate
active
06612025
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for making an electrical circuit board and more particularly, to a method for making a multi-layer electrical circuit board having interconnections between portions or layers of the circuit board.
BACKGROUND OF THE INVENTION
Multi-layer circuit boards contain and/or include electrical components which selectively and operatively populate opposed first and second surfaces (i.e., top and bottom surfaces) of each board (or other respective interior portions of each of the boards), thereby desirably allowing each of the electrical circuit boards to contain and/or include a relatively large amount of electrical components which efficiently and densely populate the respective boards.
It is desirable to allow for communication by and between and/or interconnection of the component containing surfaces and/or portions of an electrical circuit board, thereby allowing the contained electrical components on each side of the board (or within certain interior portions of the board) to cooperatively and selectively interconnect to form one or more desired electrical circuits. This communication and interconnection may require the use of shared electrical ground planes, the transmittal of electrical power and/or control type signals between each of the component containing surfaces and/or the component containing board portions, and/or the selective and physical connection of various contained components.
This desired interconnection typically requires one or more vias, apertures and/or holes to be drilled, etched and/or formed through the core of the circuit board substrate, thereby selectively creating one or more vias, apertures and/or holes which pass through and/or traverse some or all of the component containing surfaces and/or layers of the circuit board. The vias are then typically filled with a conductive material or solder (e.g., a pin or component connector is soldered into the hole). In this manner, electrical connections are made or formed which connect electrical components and/or circuitry to the core of the circuit board substrate, or to other components and/or circuitry located on the opposing side or surface of the board.
One drawback with these conventional vias is that non-solderable material (i.e., insulating material and/or material which does not substantially bind or metallurgically bond with solder) is often present within these vias, and often prevents the solder or other conductive material from electrically connecting the desired layers of circuitry and/or components together in a consistent and reliable manner. For example and without limitation, the surface tension of the deposited solder or other conductive material and the non-wettable or non-solderable surfaces within these vias often cause and/or allow the solder or other conductive material to be drawn or “sucked” out of the aperture or via in which it is deposited, thereby substantially preventing or reducing the likelihood of the solder material “wetting” or metallurgically bonding to the conducting portions or layers of the circuit board. Hence, these types of arrangements often result in a defective portion or region of the circuit board where some or all layers of the circuit board are not desirably interconnected.
There is therefore a need for a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior circuit boards and which includes vias or cavities which provide for improved solder interconnections between one or more layers of electrical circuitry.
SUMMARY OF THE INVENTION
It is a first object of the present invention to provide a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior multi-layer electrical circuit board forming methodologies and techniques.
It is a second object of the invention to provide a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior multi-layer electrical circuit board forming methodologies and techniques and which allows for the selective, efficient, and reliable interconnection between some or all of the various component containing surfaces and portions of the formed multi-layer electrical circuit board.
According to a first aspect of the present invention a method for creating a connection within a multi-layer circuit board is provided. The multi-layer circuit board assembly includes a first electrically conductive member, a second electrically conductive member, and a core layer disposed between the first and second electrically conductive members. The method includes the steps of: selectively removing a portion of the first electrically conductive member and a portion of core member, effective to create an aperture within the circuit board assembly which extends to the second electrically conductive member; providing an amount of solder-mask material having a polar molecular composition; disposing the amount of solder-mask material within the aperture, effective to cover a surface of the core member which surrounds the aperture; and inserting solder material within the aperture, effective to cause the solder material to bond with the first electrically conductive member, the solder-mask material and the second electrically conductive member, thereby creating a relatively reliable connection between the first electrically conductive member and the second electrically conductive member.
These and other objects, aspects, and advantages of the present invention will become apparent upon reading the following detailed description in combination with the accompanying drawings.
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Glevatsky Andrew Z.
Goenka Lakhi N.
Shi Zhong-You (Joe)
Kim Paul
Visteon Global Tech Inc.
Visteon Global Tech. Inc.
Vo Peter
LandOfFree
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