Method for coupling segments of a bus system

Multiplex communications – Wide area network – Packet switching

Patent

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Details

395309, 370401, G06F 1338, G06F 1340

Patent

active

058782362

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The method relates to the coupling of bus systems via multiplex links.
Devices for linking bus systems over relatively long distances are called bus couplers. Coupling via glass-fiber links is of major importance, in particular. In this case, two bus couplers are linked to one another by a connecting path, in this case a glass-fiber line. Each bus coupler converts the signals on its bus system and transmits them via the connecting path to the other bus coupler, which acts on the bus accordingly. A bus system uses data and control lines, the data lines having valid values at times determined by the control lines. A simple bus coupler continuously monitors the control lines and, in the event of a change, transmits both the status of the data lines and the changed status of the control lines. In this case, the data transmission rate required on the glass-fiber link is governed by the number of bits and the speed, which is prescribed by the bus protocol. For example, 8 data bits, 1 parity bit and the status of 9 control lines have to be transmitted for the coupling of SCSI bus systems in accordance with ANSI X3.131. Parallel-serial converters having a length of 10 bits are suitable for this purpose. Since two changes of the control line ACK and REQ are required for the transmission of one byte, four bit packets of 10 bits are transmitted. A maximum rate of 5 Mbyte/s on the bus produces a data rate of at least 200 Mbit/s, corresponding to a signal frequency of 100 MHz on the serial link. The required bandwidth is further increased by clock information. However, the data rate of 5 Mbyte/s on the bus corresponds only to a data rate of 50 Mbit/s on the serial line, only a quarter of which can thus be utilized.


SUMMARY OF THE INVENTION

The object of the invention is to operate the bus couplers such that the data rate on the connecting line is only slightly greater than the maximum data rate which is supplied by the bus system.
The invention is based on the observation that only one specific bus status change occurs in each case in the data transfer phase. Accordingly, the transmitting link is also operated in a synchronous mode during this time, in which mode each data packet implicitly leads to activation of control lines. Data packets are likewise transmitted for the acknowledgement signals, but their contents are rejected and, instead of this, they lead to activation of a control line. The control packets can thus be dispensed with and the required bandwidth can thus be reduced to a quarter.


BRIEF DESCRIPTION OF THE DRAWINGS

The features of the present invention which are believed to be novel, are set forth with particularity in the appended claims. The invention, together with further objects and advantages, may best be understood by reference to the following description taken in conjunction with the accompanying drawings, in the several Figures of which like reference numerals identify like elements, and in which:
FIG. 1 shows the arrangement of two bus segments with associated couplers and three units;
FIG. 2 shows a schematic circuit for a simple coupler;
FIG. 3 shows a schematic circuit for an improved coupler;
FIG. 4 shows a status diagram for the partial status to be transmitted; and
FIG. 5 shows a flow chart for the data transfer phase.


DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 depicts a sketch of the structure of one bus coupling method. Two coupling units KEA 14 and KEB 15 are linked to one another via a link LNK 16. SEGA and SEGB are two bus segments 20, 20' which are coupled by the coupling units KEA and KEB. Two units DEV1 11 and DEV2 12 are connected to the segment SEGA; one unit DEV3 13 is connected to the segment SEGB. Other units are connected in a similar manner. Of the bus segments, only the data lines D0.. D7, which are important in the following text, and the control lines BSY, SEL, I/O are illustrated, as well as ACK and REQ in FIGS. 2 and 3. There are other control lines (C/D, ATN, MSG and RST), but they are not illustrated for reasons of clarit

REFERENCES:
patent: 4862461 (1989-08-01), Blaner
patent: 5175817 (1992-12-01), Adams et al.
patent: 5182748 (1993-01-01), Sakata et al.
patent: 5430720 (1995-07-01), Larsson et al.
patent: 5598543 (1997-01-01), Notarianni et al.
patent: 5752076 (1998-05-01), Munson
American National Standard, ANSI X3.131-1986, Small Computer System Interface (SCSI), pp. 36-37;48-51; 188-191.

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