Method for corrosion prevention during planarization

Details Method for corrosion prevention during planarization Method for corrosion prevention during planarization

2011-05-24

2011-05-24

Norton, Nadine G (Department: 1713)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S700000, C216S088000, C216S089000

Reexamination Certificate

active

07947604

ABSTRACT:
The present invention relates to the reduction or complete prevention of Cu corrosion during a planarization or polishing process. In one aspect of the invention, RF signal is used to establish a negative bias in front of the wafer surface following polishing to eliminate Cu+or Cu2+migrations. In another aspect of the invention, a DC Voltage power supply is used to establish the negative bias.

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