Radiation imagery chemistry: process – composition – or product th – Including control feature responsive to a test or measurement
Utility Patent
1999-11-29
2001-01-02
Young, Christopher G. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Including control feature responsive to a test or measurement
C430S005000
Utility Patent
active
06168891
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method for correcting a mask pattern for use in the manufacturing of semiconductor integrated circuits (ICs) and, more particularly to, a method for improving the accuracy of an image on lithography by Reactive Ion Etching (hereinafter abbreviated as RIE) during the manufacturing of elements of semiconductor ICs, by using such a correction method as an Optical Proximity effect Correction (hereinafter abbreviated as OPC) method.
2. Description of the Related Art
A mask pattern for use in the manufacturing of semiconductor ICs (hereinafter abbreviated as mask pattern) is configured as a composite of a plurality of pattern units which correspond to each wiring etc. The mask pattern is made by use of a CAD procedure for designing of semiconductor mask layout and then replicated on the surface of each substrate according to a series of various steps of photolithography or RIE.
A mask pattern is subject to fine patterning for the purpose of improving the performance of semiconductor ICs. A mask pattern, thus finely patterned, has its own pattern units as close as possible to each other, so that an image projected through the mask pattern onto a substrate has also its component image units (which corresponds to the pattern units) as close as possible to each other. Therefore, an electron beam applied through the mask pattern onto a substrate and then reflected from it has such an effect that an apparent exposure would increase in a region where these pattern units are close to each other, thus making it difficult to project fine images. That is, an image given as a result of projection through a mask pattern is subject to deformation in shape from or fluctuation in size of the mask pattern. This is so-called the Optical Proximity Effect.
Such deformation or size-wise fluctuations of a project image will make it difficult to perform an expected patterning in strict accordance with a mask pattern, so that some correction should be made against the above-mentioned optical proximity effect. A method for performing this correction is an OPC method.
The OPC method may comprise such a step of shifting sides of each of pattern units which compose a mask pattern, to deform the shape of the pattern unit beforehand so that the shape may be biased selectively. Depending on how to determine a bias amount, such OPC method comes in two known general methods of a simulation-based OPC (hereinafter called S-OPC) method and a rule-based OPC (hereinafter called R-OPC) method.
The S-OPC method would subdivide each side of a pattern unit to perform simulation in term of light-intensity in order to extract a shape-wise difference between the original pattern unit and the one having deformation and size-wise fluctuations given as a result of this simulation, based on the results of which extraction, a bias amount may be determined for each side of the pattern unit. Since the S-OPC method subdivides each side of a pattern unit for light-intensity simulation, it is possible to reproduce the shape of the pattern unit through a photo-mask very accurately.
The R-OPC method uses as a basis such attributes of a pattern unit as its size and shape as well as a proximate situation with adjacent one etc., to determine a bias amount for each side of the pattern unit, so that its each side may be biased according to thus determined bias amount.
Both of the OPC methods, however, suffer from the following respective disadvantages. The S-OPC method performs simulation for each side of a pattern unit, thus requiring a great deal of time for its computational processing. Also, since the shape of a pattern unit is generally stored in the values of coordinates of each side or vertex of a pattern unit, the pattern unit after being corrected is subject to deformation upon each side as subdivided. Therefore, the amount of data required to record the shape of a pattern unit after correction is much larger than that required before correction.
To eliminate this disadvantage, the S-OPC method may well provide a certain limit to the subdivision of each side. Having done so, however, such an event may happen that a pattern accuracy cannot be secured when a semiconductor IC is formed using pattern units as having undergone S-OPC.
The R-OPC method, on the other hand, does not perform light-intensity simulation, permitting high speed computational processing as compared to the S-OPC method. Also, since the R-OPC method does not deform each side of a pattern unit by subdivision during correction, it only requires a smaller amount of data in recording of a pattern unit shape than the S-OPC method. However, in order to perform a high-accuracy R-OPC operation for an ever diversifying pattern unit, it is necessary to set finely such items as pattern unit size and shape as well as its positional situation with peripheral ones which are used to determine a bias amount. To meet such a requirement, complex computational algorithm must be used in performing of the R-OPC method, which leads to increases in the amount of time and data for OPC computational processing, thus suppressing the advantages of the R-OPC method over the S-OPC method.
Thus, when S-OPC is performed, the as-finished accuracy is indeed improved for semiconductor ICs but the processing time and the data amount required are greatly increased. If R-OPC is performed, on the other hand, the required processing time and data amounts indeed suppressed but the as-finished accuracy for semiconductor ICs is deteriorated.
With this, conventionally, to eliminate the above-mentioned disadvantages inherent to the OPC methods, such a correction method as Laid-Open Patent Application No. Hei8-286358 has been proposed.
According to this correction method, before OPC is performed, such graphic logical operational processing in a broad sense as contraction and expansion of graphics as well as deletion of overlaps between adjacent graphics themselves is carried out to extract pattern units subject to OPC processing, so that thus extracted pattern units may undergo either the R-OPC or S-OPC methods so as to enjoy the advantages of both of them.
In such a prior art also, however, graphic logical operational processing is performed step-wise to extract pattern units on which OPC is to be carried out, so that it suffers from a problem of increasing the number of steps of the graphic logical operational processing. Moreover, for each step of the graphic logical operational processing, a data set containing the pattern units is read in to perform the graphic logical operational processing, thus outputting the results as a new data set, so that each file requires processing for many times of its read-in operation, thus increasing the processing time for the extraction of patterns required for the performing of OPC, which makes it difficult to reduce the time for processing.
Furthermore, such a pattern unit as not being rectangular must be divided, thus making incorrect the results of correcting a boundary portion between thus divided pattern units adjacent to each other.
SUMMARY OF THE INVENTION
In view of the above, it is the main object of the invention to provide a method for correcting a mask pattern for semiconductor ICs which is able to efficiently extract pattern units subject to OPC processing rapidly and accurately correct thus extracted pattern units.
The other objects, features, and advantages of the invention will be apparent from the following description.
The first aspect of the invention is, in short, a method for correcting mask patterns for semiconductor ICs, comprising the steps of: a sorting step of sorting pattern units composing a mask pattern based on their respective shapes and/or their proximate relative positional relationships; and a correction step of select some of the above-mentioned sorted pattern units and correcting them.
The second aspect of the invention is a method for correcting mask patterns for semiconductor ICs, comprising the steps of: a sorting step of sorting the component sides of p
Jacobson Price Holman & Stern PLLC
Matsushita Electric - Industrial Co., Ltd.
Young Christopher G.
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