Method for correcting a design data of a layout pattern of a...

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S942000, C438S800000

Reexamination Certificate

active

06689625

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-095971, filed Mar. 29, 2001, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a photomask for correcting the design data of the layout pattern of a photomask for transferring a predetermined optical image pattern onto a substrate, a photomask manufactured by using the layout pattern corrected by the correcting method, and a method for manufacturing a semiconductor device using the photomask thus manufactured.
2. Description of the Related Art
With progress in the miniaturization of the circuit pattern of a semiconductor device, the miniaturization also proceeds in the pattern size of the photomask providing the original plate of the circuit pattern. In this connection, the demands for accuracy are becoming strict and strict. In recent years, various corrections such as the OPC (Optical Proximity Correction) have come to be applied to the design pattern in the device process in order to achieve an accuracy of several nanometers. Naturally, the accuracy of the photomask is a very important factor in the device process.
In the manufacturing process for a semiconductor device or a photomask, it is generally known to the art that the process size is changed depending on the pattern aperture rate or the pattern density by the micro loading effect in the step of the developing process or the dry etching process. In general, the size of the pattern on the photomask is several times as large as the size of the image transferred onto the wafer, with the result that the pattern aperture rate of the photomask greatly differs depending on the layer, which to increases the variations in size generated by the difference in the aperture rate. It should also be noted that, in devices having a large variation in density, such as a memory-mixed logic device, the difference in density of the patterns among the different regions on the photomask is increased by the diversification of the devices. As a result, the change in size caused by the micro loading effect has obstructed the improvements in the dimensional accuracy and positional accuracy corresponding to the demands for the miniaturization.
The conventional method for manufacturing a photomask for controlling the change in size caused by the pattern aperture rate and the pattern density will now be described.
The layout data for photomask writing system is basically equal to the initial design data, and the pattern size drawn by photomask writing system is equal to the desired pattern size. It should be noted, however, that, where the finish size is shifted from the design data because of, for example, the decrease in the shot connection in EB (electron beam) exposure system using VSB (variable shaped beam) method and the improvements in the pattern image quality and the dimensional accuracy, a predetermined photomask data bias(resize) is given to the layout data for photomask writing system relative to the design data. In any case, photomask data bias is uniform relative to a certain process regardless of the pattern aperture rate.
However, since there is a large difference in the etching area between, for example, a pattern involving a contact hole and a pattern for a wiring such as a gate electrode, the etching rates for these patterns differ from each other, which gives rise to a difference in the pattern shape and to a difference of scores of nanometers in the final size. For overcoming this difficulty, it was customary in the past to roughly classify the patterns mainly into contact holes group and a wiring group and to prepare a photomask by controlling the process conditions such as the dose, the developing time and the etching time according to on the kind of pattern, so as to control the process size.
If the finish size, the positional accuracy and the XY difference of the processed photomask fail to satisfy the standards, the photomask is discarded as a defective photomask, and a new photomask is remade again by controlling and changing the process conditions. In this fashion, similar steps are repeated until a photomask satisfying the desired standards is obtained.
However, even in the same wiring group pattern, the aperture rate differs if the patterns differ from each other in the line width and the chip area. Also, if the difference in the pattern density differs, a change in the process size also takes place similarly. In some cases, the difference in size between the patterns is increased to reach scores of nanometers. The change in the process size also affects the positional accuracy and the accuracy in the XY difference. It is difficult to control such a large difference in size by adjusting the process conditions alone, and it is necessary to repeat the preparation many times by adjusting the process conditions. Depending on the process conditions, the process margin was lowered, which brought about drawbacks such as an increase in defects.
Particularly, when it comes to a pattern having a large difference in density such as a logic device, a change in the size is large so as to makes it difficult to control the process conditions. In this case, the first lot for the new pattern is rendered defective in many cases, which gives rise to the problem that the yield is lowered.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a method of manufacturing a photomask for correcting a layout pattern of a photomask in which are arranged a light transmitting pattern portion and a light shielding pattern portion for forming an optical image pattern on the surface of a substrate, comprising calculating a pattern area ratio, which is a ratio of the light transmitting pattern portion or the light shielding pattern portion to an area of the photomask from the design data of a given layout pattern of the photomask, and a pattern density, which is a ratio of the light transmitting pattern portion or light shielding pattern portion within the region to the area of the region extracted from the given layout pattern; estimating from the calculated pattern area ratio and the pattern density the size of a pattern, positional accuracy or the XY difference, covering the case where the pattern is formed on the photomask by using the design data of the given layout pattern; and imparting the amount of correction to the design data of the given layout pattern based on the estimated pattern size, positional accuracy or the XY difference.
According to a second aspect of the present invention, there is provided a method of manufacturing a photomask for correcting the layout pattern of a photomask in which a light transmitting pattern portion and a light shielding pattern portion are formed for forming a predetermined optical image pattern on the surface of a substrate, comprising, calculating a pattern area ratio, which is a ratio of the area of the light transmitting pattern portion or the light shielding pattern portion to the area of a photomask, and a pattern density, which is a ratio of the area of the light transmitting pattern portion or the light shielding pattern portion within the region to the area of the region extracted from the given layout pattern based on given design data of the layout pattern of the photomask; estimating the positional accuracy of the formed pattern from the calculated pattern area ratio and the pattern density, covering the case where a pattern is formed in the photomask by using given design data of the layout pattern; and imparting a correction amount to the given layout pattern based on the estimated positional accuracy.
Further, according to a third aspect of the present invention, there is provided a method of manufacturing a photomask for correcting the layout pattern of the photomask in which a light transmitting pattern portion and a light shielding pattern portion are a

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for correcting a design data of a layout pattern of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for correcting a design data of a layout pattern of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for correcting a design data of a layout pattern of a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3310617

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.