Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Power system
Reexamination Certificate
2005-03-08
2005-03-08
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Power system
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06865526
ABSTRACT:
A method for reducing power consumption by using power estimation data obtained from at the gate-level for a core's representative input stimuli data (instructions), and propagating the power estimation data to a higher (object-oriented) system-level model, which is parameterizable and executable. Depending on the kind of cores, various parameterizable look-up table techniques are used to facilitate self-analyzing core models. As a result, the method is faster than gate-level power estimation techniques and power-related system-level design decisions.
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Givargis Tony
Henkel Jörg
Vahid Frank
Craig Dwin M.
NEC Corporation
Teska Kevin J.
University of California-Riverside
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