Boots – shoes – and leggings
Patent
1994-08-05
1996-04-23
Lall, Parshotam S.
Boots, shoes, and leggings
395481, 364DIG1, 364DIG2, G06F 1200
Patent
active
055111742
ABSTRACT:
A method for selectively controlling the operation of a computer system so that the computer system is selectively caused to execute instructions of a first predetermined bit length or instructions of a second predetermined bit length. The method comprises the preliminary steps of storing instruction data in a set of EVEN instruction storage locations; storing instruction data in a set of ODD instruction locations; establishing an EVEN execution pointer; and establishing an ODD execution pointer. At a first given time, either the EVEN execution pointer is incremented by a predetermined COUNT or the ODD execution pointer is incremented by the predetermined COUNT; but both pointers are not simultaneously incremented by the COUNT. The method causes an instruction to be executed, which instruction was stored entirely in either an EVEN instruction location or entirely in an ODD instruction location. At a second given time, both the EVEN instruction pointer and the ODD instruction pointer are incremented by the predetermined COUNT, thereby causing an instruction to be executed, which instruction constitutes a combination of instruction data from an EVEN instruction storage location and instruction data from an ODD instruction storage location.
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The Approach to Multiple Instruction Execution in the Gmicro/400 Processor by Yoshida et al. IEEE 1991, pp. 185-195.
Alexander Thomas
Hicok Gary D.
Kim Yongmin
Lim Yong J.
Lall Parshotam S.
Maung Zarni
VLSI Technology Inc.
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