Method for controlling the clock phase of a receiving system for

Details Method for controlling the clock phase of a receiving system for Method for controlling the clock phase of a receiving system for

1981-02-23

1983-06-21

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

375 14, 375118, 328155, H04L 704

Patent

active

043897274

ABSTRACT:
Method for controlling the phase of a decision circuit clock of a receiving system for digital data, according to which the frequencies above 1/T (T=data symbol period) are substantially eliminated, whereafter the phase deviation to be corrected is evaluated and the clock is shifted in accordance with this phase deviation, inclusive of its sign. An example of a circuit for using this method includes a lowpass filter circuit and an evaluation and phase shifting circuit for fixing the optimum decision instants of the decision circuit provided at the output of an adaptive filter.

REFERENCES:
patent: 4035625 (1977-07-01), Chiu et al.
patent: 4146840 (1979-03-01), McRae et al.
patent: 4228409 (1980-10-01), Wouda et al.
patent: 4251777 (1981-02-01), Sartorius et al.

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