Method for controlling solderability of a conductor and conducto

Details Method for controlling solderability of a conductor and conducto Method for controlling solderability of a conductor and conducto

1997-12-05

1999-10-05

Zimmerman, John J.

Stock material or miscellaneous articles

All metal or with adjacent metals

Having variation in thickness

428632, 428614, 228254, 22818022, B32B 310, B23K 3102

Patent

active

059621516

ABSTRACT:
A conductor (112), a method for forming the conductor (112), and a method for attaching a discrete circuit device, such as a bond pad, chip capacitor, chip resistor, etc., to the conductor (112) with solder connections (16). Solder connections (16) formed by the method are characterized as being accurately located on the conductor (112) and having a shape and location that achieves an adequate and uniform stand-off height for the device, and improves thermal cycle fatigue life. Such benefits are achieved by forming a nonsolderable layer (114) on a substrate (10), and then forming a solderable conductor (112) on the substrate (10) such that a first portion of the conductor (112) overlies the nonsolderable layer (114) and a second portion of the conductor (112) does not overlie the nonsolderable layer (114). In so doing, the first and second portions of the conductor (114) define a boundary therebetween beyond which solder deposited on the second portion of the conductor (112) is inhibited from flowing onto the first portion of the conductor (112).

REFERENCES:
patent: 4081901 (1978-04-01), Miller
patent: 5162257 (1992-11-01), Yung
patent: 5480835 (1996-01-01), Carney et al.
patent: 5494856 (1996-02-01), Beaumont et al.
patent: 5620131 (1997-04-01), Kane et al.
patent: 5738269 (1998-04-01), Masterton
patent: 5818697 (1998-10-01), Armezzanie et al.

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