Method for controlling polishing time in chemical-mechanical...

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Reexamination Certificate

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C451S041000, C451S054000, C451S059000, C216S089000, C438S692000

Reexamination Certificate

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06530822

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for improving the chemical-mechanical polishing process in semiconductor manufacture, more particularly to the method for generating out the desired polishing time in the chemical-mechanical polishing process.
2. Description of the Prior Art
Chemical-mechanical polishing (CMP) is one of the common planarizing techniques. The method is used to achieve a planar surface over the entire chip and wafer, referred to as “global planarity”. It consists of a rotating holder that holds the wafer, an appropriate slurry, and a polishing pad that is applied to the wafer at a specified pressure. CMP is not limited to dielectrics. It is used to planarize deep and shallow trenches filled with polysilicon or oxide, and various metal films.
Polishing results from a combination of chemical and mechanical effects. A suggested mechanism for CMP involves the formation of a chemically altered layer at the surface of the material being polished. This layer is mechanically removed from the surface, beginning the process again. For example, in SiO
2
polishing, the altered layer may be a hydrated oxide that can be mechanically removed or, for metal polishing, a metal oxide may be formed and removed.
In the general case of oxide chemical-mechanical polishing (CMP), the polishing time is found according to the following equation:
polishing time=removal thickness/polishing rate
where removal thickness and polishing rate are constants. Accordingly the calculated polishing time is surely a constant. That is, every lot of the production wafers is put into the CMP apparatus and is polished for the same period of time due to the same values of removal thickness and polishing rate. The variability of the original thickness of oxide layers is not considered during the chemical-mechanical polishing process. The polishing rate is generally found from the periodic machine tests, in which the dummy wafer is employed. Then, every lot of production wafers sent into the polishing machine is polished under the set of the constant polishing rate for the rough constant polishing time. However, in the repetitionary chemical-mechanical polishing processes, the polishing rate is easily changed for reasons including the impact of some elements such as pads and dressers in the integrated circuits, and consuming of the polishing pad of the machine. In conventional procedures, to get an accurate polishing time, a greater number of machine tests should be done, and the production processes should certainly be paused more frequently. After that, unfortunately, the throughput will be reduced and the cost of ownership will be increased.
For the foregoing reasons, there is a need to develop a method for controlling the polishing time to a more accurate polishing time to enhance CMP quality.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for finding an accuracy polishing time that substantially can improve CMP quality. The method comprises mainly the following step. An initial polishing rate, a reference removal thickness, a reference pre-thickness and a target thickness are provided firstly. A first wafer including a first layer is subsequently provided. After measuring the thickness of the first layer, the result as a first pre-thickness is then obtained. The difference between the reference pre-thickness and the first pre-thickness is the so-called first pre-variability. A first removal thickness is found by adding the first pre-variability to the reference removal thickness. After dividing the first removal thickness by the initial polishing rate, a first polishing time is obtained. The first layer of the first wafer is treated by chemical-mechanical polishing for the period of the first polishing time. Then, the thickness of the second layer is measured, and the result is the so-called second post-thickness. The difference between the target thickness and the second post-thickness is the so-called the second post-variability. The second post-variability is then divided by the second polishing time. The result is then added to the first polishing rate to form a first polishing rate. A second wafer is provided and includes a second layer. After measuring the thickness of the second layer, the result as a second pre-thickness is obtained. The difference between the reference pre-thickness and the second pre-thickness is the so-called second pre-variability. Subsequently, a second removal thickness is found by adding the second pre-variability to the reference removal thickness. After dividing the second removal thickness by the first polishing rate, a second polishing time is obtained. The second layer of the second wafer is then treated by chemical-mechanical polishing for the period of the second polishing time. The thickness of the second layer is measured and the result is the so-called second post-thickness. The difference between the target thickness and the second post-thickness is a second post-variability. After dividing the second post-variability by the second polishing time, the result is subsequently added to the first polishing rate to form a second polishing rate. The second polishing rate can be used to find the third polishing time. The principle can be expanded to the n-th term or above. The every predicted polishing time from the principle is more accuracy the conventional one. Accordingly, the CMP quality can be surely be enhanced.


REFERENCES:
patent: 5695601 (1997-12-01), Kodera et al.
patent: 5738574 (1998-04-01), Tolles et al.
patent: 5830041 (1998-11-01), Takahashi et al.
patent: 6086457 (2000-07-01), Perlov et al.
patent: 6113462 (2000-09-01), Yang
patent: 6117780 (2000-09-01), Tsai et al.

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