Method for controlling gate size for semiconduction process

Details Method for controlling gate size for semiconduction process Method for controlling gate size for semiconduction process

1992-05-27

1994-08-30

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 29, 437 44, 437203, H01L 21265

Patent

active

053427963

ABSTRACT:
A method for preparing a semiconductor device comprises the following steps: (I) depositing at least nitride film on the whole surface of a semiconductor substrate having a field oxide film, (II) removing a portion of the nitride film from a gate-formation region to form an opening at the nitride film up to the substrate, (III) thereafter forming by selective oxidation a vertically projecting oxide film on the substrate at the opening portion, (IV) then removing all the films including the oxide film and the nitride film each covering the substrate to form a dug part of the substrate at the gate formation region, (V) providing on the dug part a gate oxide film and a gate electrode in the order, (VI) doping an impurity ion into the substrate in a manner of self-alignment using the gate electrode as a mask, and (VII) applying heat treatment to the substrate to form an impurity-diffused region.

REFERENCES:
patent: 4685196 (1987-08-01), Lee
patent: 4803173 (1989-02-01), Sill et al.
patent: 4939100 (1990-07-01), Jeuch et al.
patent: 4992388 (1991-02-01), Pfiester

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