Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2008-11-25
2010-06-22
Nguyen, Linh V (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S155000, C341S161000, C341S166000
Reexamination Certificate
active
07741986
ABSTRACT:
An inverter circuit configuring a delay unit is a so-called CMOS transistor including a PMOS transistor and an NMOS transistor, of which respective gates are interconnected and respective drains are interconnected. The source and a back gate of the NMOS transistor are connected to the ground. The source of the PMOS transistor is connected to a positive drive terminal and controlled by an analog input signal. The back gate of the PMOS transistor is connected to a control terminal and controlled by a control signal.
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Office Action dated Sep. 15, 2009 in the corresponding Japanese patent application No. 2007-307521 (and English translation).
Watanabe Takamoto
Yamauchi Shigenori
DENSO CORPORATION
Nguyen Linh V
Posz Law Group , PLC
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