Method for controlling asynchronous clock domains to perform...

Details Method for controlling asynchronous clock domains to perform... Method for controlling asynchronous clock domains to perform...

2005-10-20

2009-02-17

Nguyen, Steven H (Department: 2616)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C370S535000, C714S731000, C714S744000, C713S400000, C713S600000

Reexamination Certificate

active

07492793

ABSTRACT:
A method for controlling asynchronous clock domains to perform synchronous operations is provided. With the method, when a synchronous operation is to be performed on a chip, the latches of the functional elements of the chip are controlled by a synchronous clock so that the latches are controlled synchronously even across asynchronous boundaries of the chip. The synchronous operation may then be performed and the chip's functional elements returned to being controlled by a local clock in an asynchronous manner after completion of the synchronous operation. This synchronous operation may be, for example, a power on reset (POR) operation, a manufacturing test sequence, debug operation, or the like.

REFERENCES:
patent: 5522048 (1996-05-01), Offord
patent: 7200767 (2007-04-01), Jonnalagadda
patent: 2005/0240847 (2005-10-01), Nadeau-Dostie et al.

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