Method for controlling access to a computer bus

Details Method for controlling access to a computer bus Method for controlling access to a computer bus

1997-11-14

1999-05-18

Sheikh, Ayaz R.

395306, 395309, G06F13/14

Patent

active

059058781

ABSTRACT:
A bus controller controls access to a computer bus by a plurality of bus requesters. The bus controller activates a priority bus request line on the computer bus regardless of which of plural priority bus agents desires to transmit a transaction on the computer bus. The bus controller receives an I/O request signal from a bus agent and determines whether the priority bus request line is in an active state. If the priority bus request line is not in the active state, then the bus controller activates the priority bus request line in response to the I/O request signal. If the priority bus request line is already in the active state, then the bus controller leaves the priority bus request line in the active state for a time period sufficient to enable the bus agent to transmit a transaction on the computer bus. In addition, the bus controller transmits an I/O grant signal to the bus agent to enable the bus agent to transmit the transaction on the computer bus. Controlling the priority bus request line solely with the bus controller enables the control of the processor bus to switch between priority bus agents without having to deactivate and reactivate the priority bus request line.

REFERENCES:
patent: 5581782 (1996-12-01), Sarangdhar et al.
patent: 5764934 (1998-06-01), Fisch et al.
patent: 5778438 (1998-07-01), Merchant
M. Morris Mano, Computer System Architecture (Second Edition), Prentice-Hall, Inc., 1982 pp. 406-415 and pp. 454-462.

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