Method for controlling a non-volatile semiconductor memory...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185020, C365S185170, C365S185180, C365S185220

Reexamination Certificate

active

07916547

ABSTRACT:
A non-volatile semiconductor memory device has a NAND string, in which multiple memory cells are connected in series. A read procedure is performed for a selected memory cell in the NAND string on the condition that the selected memory cell is applied with a selected voltage while unselected memory cells are driven to be turned on without regard to cell data thereof. In the read procedure, a first read pass voltage is applied to unselected memory cells except an adjacent and unselected memory cell disposed adjacent to the selected memory cell, the adjacent and unselected memory cell being completed in data write later than the selected memory cell, and a second read pass voltage higher than the first read pass voltage is applied to the adjacent and unselected memory cell.

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U.S. Appl. No. 12/868,196, filed Aug. 25, 2010, Fujimura.

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