Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Parameter related to the reproduction or fidelity of a...
Patent
1991-09-30
1994-03-01
Tokar, Michael J.
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Parameter related to the reproduction or fidelity of a...
368120, 3281291, 328110, 328109, H03K 526
Patent
active
052911411
ABSTRACT:
A digital data propagation delay margin monitoring circuit that includes (a) a digital data propagation unit having a send flip-flop, a combinatorial delay, and a receive flip-flop; and (b) a margin detection circuit having a test flip-flop that receives the same input as the receive flip-flop and is configured to have a set up time margin or a hold time margin that is less than the set up margin or hold time margin of the receive flip-flop by a predetermined amount, depending upon which margin is being monitored. The outputs of the receive flip-flop and the test flip-flop are compared by a comparison circuit which provides an indication of when the outputs of the receive flip-flop and the test flip-flop are different, which indicates that the monitored margin of the receive flip-flop has been reduced to a predetermined margin or less. For set up margin monitoring, the data propagation unit is the actual system path that is a worst case for set up, or a surrogate for such actual system path, and the test flip-flop is configured to have a reduced set up margin by a delay at its input or by an advanced clock signal. For hold margin monitoring, the data propagation unit is the actual system path that is a worst case for hold time, or a surrogate for such actual system path, and the test flip-flop is configured to have a reduced hold time margin by a delay clock signal.
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Farwell William D.
Mascitelli Alida G.
Alkov L. A.
Denson-Low W. K.
Hughes Aircraft Company
Solis Jose M.
Tokar Michael J.
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