Method for constructing fault classification tables of analog ci

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

39550023, G06F 1900

Patent

active

060351144

ABSTRACT:
The present invention discloses a method for constructing the fault classification tables of analog circuits, and the fault classification tables can be further applied to construct analog CAT tools. The constructing method uses the fault models but the normal models inserting in parts of the analog circuit components, and then utilizes a circuit simulator to obtain waveform from the defect analog circuit. Exclusive and non-exclusive classification schemes are applied to establish the failure modes of the defect analog circuit when the waveform is recorded as a fault dictionary. It is unnecessary to construct a real analog circuit as the conventional does.

REFERENCES:
patent: 5099436 (1992-03-01), McCown et al.
patent: 5511162 (1996-04-01), Hamada et al.
patent: 5515384 (1996-05-01), Horton, III
patent: 5544308 (1996-08-01), Giordano et al.
Sujoj Sen et al. "Simulation-Based Testability Analysis and Fault Diagnosis", IEEE, Sep. 1999.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for constructing fault classification tables of analog ci does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for constructing fault classification tables of analog ci, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for constructing fault classification tables of analog ci will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-370891

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.