Method for constructing a leadless array package

Details Method for constructing a leadless array package Method for constructing a leadless array package

1998-12-16

1999-12-21

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

438113, 438460, H01L 2140

Patent

active

060048336

ABSTRACT:
A method of constructing a leadless array integrated circuit package that mounts directly to a printed circuit board, without pins, but has accessible contacts for testing and inspection. The method includes arranging a series of metal bonding pads on a top side of an insulating substrate and then attaching an array of integrated circuit chips to the metal bonding pads. The integrated circuit chips are encapsulated and then partially separated and electrically isolated prior to testing the chips for any fabrication faults. The chips are then completely separated into individual chip packages. The individual chip packages can then be installed on a printed circuit board. The chip package is heated in a furnace during package fabrication and mounts to the printed circuit board by solder flow contacts on the perimeter of the chip package that melds with solder paste applied to the printed circuit board.

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