Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1997-06-20
1999-11-09
Beck, Shrive
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
427 96, 427 99, 4271261, 427250, 427346, 427348, 427368, 4274197, 438690, 438691, 438692, 438693, B05D 512
Patent
active
059809795
ABSTRACT:
A method is presented for consistently forming low resistance contact structures in vias between interconnects. A two-step adhesion layer deposition process with an intermediate particle removing step is employed to ensure sidewalls and bottom surfaces of vias are adequately covered with adhesion layer material prior to via plug formation. Two separate layers of an adhesion layer material (e.g., TiN) are deposited, each layer having a thickness which is adequate for that layer to act as a nucleating surface for subsequently deposited via plug material (e.g., W). The particle removing step is performed following deposition of a first adhesion layer. During the particle removing step, particles of the adhesion layer material are removed from the upper surface of the first adhesion layer, including particles blocking via openings. Following the particle removing step, a second adhesion layer is deposited over the first adhesion layer and any remaining exposed surfaces of the interconnect dielectric layer not covered by the first adhesion layer. The two-step adhesion layer deposition process substantially reduces the probability that a given via will be blocked by an adhesion layer particle. As a result, the two-step deposition process is very effective in ensuring sidewalls and bottom surfaces of vias are adequately covered by adhesion layer material. Fewer high resistance contact structures are formed, and yields of wafer fabrication processes are increased.
REFERENCES:
patent: 4465716 (1984-08-01), Baber et al.
patent: 4962414 (1990-10-01), Liou et al.
patent: 5533923 (1996-07-01), Shamouilian et al.
patent: 5833817 (1998-11-01), Tsai et al.
Advanced Micro Devices , Inc.
Beck Shrive
Daffer Kevin L.
Strain Paul D.
LandOfFree
Method for consistently forming low resistance contact structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for consistently forming low resistance contact structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for consistently forming low resistance contact structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1452365