Electrical computers and digital processing systems: processing – Processing architecture – Distributed processing system
Patent
1997-05-29
2000-04-04
Teska, Kevin J.
Electrical computers and digital processing systems: processing
Processing architecture
Distributed processing system
39550018, 712 22, 712 10, 712 11, 712 14, 712 15, G06F 1700
Patent
active
060471158
ABSTRACT:
A dynamically reconfigurable FPGA includes an array of tiles on a logic plane and a plurality of memory planes. Each tile has associated storage elements on each memory plane, called local memory. This local memory allows large amounts of data to pass from one FPGA configuration (memory plane) to another with no external memory access, thereby transferring data to/from the storage elements in the logic plane at very high speed. Typically, all the local memory can be simultaneously transferred to/from other memory planes in one cycle. Each FPGA configuration provides a virtual instruction. The present invention uses two different types of virtual instructions: computational and pattern manipulation instructions. Computational instructions perform some computation with data stored in some pre-defined local memory pattern. Pattern manipulation instructions move the local data into different memory locations to create the pattern required by the next instruction. A virtual computation may be accomplished by a sequence of instructions.
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Mohan Sundararajarao
Trimberger Stephen M.
Harms Jeanette S.
Siek Vuthe
Tachner Adam H.
Teska Kevin J.
Xilinx , Inc.
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