Method for configuring chip selects in memories

Details Method for configuring chip selects in memories Method for configuring chip selects in memories

2005-04-05

2005-04-05

Phung, Anh (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S191000, C365S189020

Reexamination Certificate

active

06876563

ABSTRACT:
Embodiments of the present invention relate to an electronic device having programmable chip enable inputs in that each chip enable has a programmable assertion level, e.g., high or low. The device may be an integrated memory chip, e.g., SRAM device. On power up, a JTAG input port of the electronic device can be used to program a configuration register which contains bits for setting the assertion level of each chip enable input. The bits may be used to control respective multiplexers which select between a chip enable signal and its inverse. The chip enable signals may originate from a controller device. Regarding a memory device, the outputs of the multiplexers are coupled to chip enable signals of an integrated memory core. The pre-configurable chip selects comprise chip select pins which are individually configured to active-high or active-low configurations so that the number of selectable memory chips requires only a number of chip selects equal to the number of times a memory is doubled, plus one chip select.

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