Method for concurrent formation of contact and via holes

Metal working – Method of mechanical manufacture – Electrical device making

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427 96, 174261, H01K 310

Patent

active

056132964

ABSTRACT:
In order to facilitate the fabrication of wiring layers in integrated circuit devices, the conductive path interconnections between areas of conduction on three layers, the three layers being separated by insulating layers, of the integrated circuit are fabricated during the same sequence of operations. The regions of conduction can be associated with the surface of a semiconductor substrate along with associated components fabricated thereon and two wiring layers, or the regions of conduction can be associated with three wiring layers. After the second insulating layer is formed, but before the formation of the final conductive layer, holes are created, a portion of the holes extending through the second insulating region to the prior wiring layer and a portion of the holes extending through the second insulting layer and through the first insulating layer to a semiconductor substrate or to an initial wiring layer. In order to provide a conductive plug for high aspect holes, a final conductive layer is formed, and pressure is applied thereto, forcing the conductive material into the holes. The conductive material remaining is patterned and etched to form a final wiring layer.

REFERENCES:
patent: 5061438 (1991-10-01), Lillie et al.
patent: 5268194 (1993-12-01), Kawakani et al.
IEEE, Dixit et al., "A Novel High Pressure Low Temperature Aluminum Plug Technology For Sub-0.5 .mu.m Contact/Via Geometries", pp. 5.3.1-5.3.4, 1994.
"Enhanced Bottom Coverage of Sub-Micron Contact Holes Using a Novel Hi-Fill Ti/TiN Sputter Process".

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