Method for computer system development verification and testing

Details Method for computer system development verification and testing Method for computer system development verification and testing

1992-12-22

1994-11-08

Lall, Parshotam S.

Excavating

395575, 371 162, 371 19, G06F 9455, G06F 1516

Patent

active

053635019

ABSTRACT:
A method for executing diagnostic/testing programs written directly for a computer to be tested. In the preferred embodiment, the operation of the computer to be tested is simulated by a simulation computer and the diagnostic/testing programs are executed on a native computer. The native computer provides messages to the simulation computer indicating operations the diagnostic/testing program attempted to perform on the native computer. The simulation computer receives the messages and executes the operations indicated by the messages. The simulation computer generates response messages indicating the steps the computer to be tested would have executed, such as a direct memory access (DMA read/write), in response to the operations the diagnostic/testing program attempted to perform on the native computer. The response messages are provided to the native computer, which executes the steps contained in the reply messages. The results of the steps executed by the native computer are the desired diagnostic/testing results. Since the diagnostic/testing program is not executed directly by the simulation computer, the diagnostic/testing program need not be tailored to a particular simulation computer.

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patent: 5157782 (1992-10-01), Turttle et al.
patent: 5249299 (1993-09-01), Iwata

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