Method for compressing data-vectors for a circuit board testing

Electricity: measuring and testing – Plural – automatically sequential tests

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324158R, 371 27, G01R 3128

Patent

active

050014188

ABSTRACT:
Disclosed is a method for compressing sequences of data-vectors, which sequences are to be used for testing circuit boards with the aid of a circuit board testing machine. The method involves an initial compression of the data-vector sequence followed by a so-called K-T transformation of the remaining data-vectors. The initial compression involves eliminating redundant data-vectors from the initial sequence and retaining only the unique data-vectors together with sequencing information indicating where in the initial sequence each unique-data vector occurred. The K-T transformation involves a bitwise logical exclusive-OR operation (XOR) whereby the remaining data-vector sequence is K-T transformed thereby further compressing the sequence without losing any of the original sequence information.

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Michael A. Lassner, Kevin W. Keirn, and Kenneth E. Posse, "Optimization of a Hardware Oriented Test Generation Language," ATE '87 West, Jan. 5-8, 1987, pp. VII-1-VII-15.
Trent Cave, "Compressing Test Patterns to Fit into LSI Testers," Electronics, Oct.-Dec., 1978, vol. 51, pp. 136-140.

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