Method for composing addresses of a memory

Details Method for composing addresses of a memory Method for composing addresses of a memory

1983-01-24

1986-07-29

Groody, James J.

Facsimile and static presentation processing

Static presentation processing

Attribute control

365189, 382 56, 382 44, H04N 146, G11C 700

Patent

active

046033483

ABSTRACT:
A method for subdividing the addresses of a multi-dimensional memory, having n-dimensional addresses defined over a logical address space which is divided into a plurality of unit divisions. Each unit division has several vertices each of which is addressable by one of the n-dimensional addresses. Each one of the addresses associated with a given unit division is divided and allocated to a distinct memory bank so that no two addresses of the same unit division are in the same memory bank. There are a total of 2.sup.n memory banks, each having independent data lines and address lines. The original n-dimensional address of the vertices determines to which memory bank the vertex address will be allocated. Moreover, the n-dimensional address also determines the address of the given vertex within the memory bank to which it has been allocated. Thus, the data corresponding to all the vertices of a given unit division can be accessed simultaneously to thereby significantly reduce data retrieval times in many applications.

REFERENCES:
patent: 4346401 (1982-08-01), Ohara
patent: 4509194 (1985-04-01), Harrington

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