Method for compiling and executing a parallel program

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C717S135000, C717S150000, C703S014000

Reexamination Certificate

active

07493606

ABSTRACT:
A method for multi-platform parallel or real-time machine programming is provided. The method comprises specifying a parallel machine definition code defining a plurality of signal or data processing components and a communication of data or signals between the components, automatically converting the code into computer instructions for execution on an essentially sequential, non-parallel computer processor, a parallel execution of the instructions on the sequential processor and automatically converting the code into hardware programming data for providing parallel hardware operation according to the code, by including, in the hardware programming data, event control circuitry specification, priority control circuitry specification and buffering control circuitry specification to ensure that the hardware operation matches the execution on the sequential computer processor. The parallel machine code is implemented using the hardware programming data on a parallel hardware machine having parallel processing capability and using the computer instructions on the sequential processor in a manner that is essentially exchangeable.

REFERENCES:
patent: 2003/0154466 (2003-08-01), Snider
patent: 2004/0044514 (2004-03-01), Granny et al.
patent: 0 437 491 (1995-12-01), None
patent: WO 02/13004 (2002-02-01), None
Verbauwhede et al., “The Happy Marriage of Architecture and Application in Next-Generation Reconfigurable Systems”, Apr. 14, 2004, ACM, pp. 363-376.
Salcic et al., “REFLIX: a processor core with native support for control-dominated embedded applications”, Aug. 11, 2003, Elsevier, pp. 13-25.

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