Method for communicating between a microprocessor and an interfa

Details Method for communicating between a microprocessor and an interfa Method for communicating between a microprocessor and an interfa

1995-12-26

1997-09-23

Harvey, Jack B.

395306, G06F 1300

Patent

active

056713754

ABSTRACT:
A protocol between a microprocessor (21) and an interface circuit (11). The interface circuit (11) transmits an enable signal (124) to the microprocessor (21). Upon receiving the enable signal (124), the microprocessor (21) transmits a set of pulses of a window signal (125) to the interface circuit (11), which in turn provides the microprocessor (21) with information concerning a circuit element (36) through a data signal (127). The microprocessor (21) initiates a command by transmitting a pulse of a command signal (126) to the interface circuit (11). The interface circuit (11) accepts and executes the command only if a predetermined chronological condition between the pulse of the command signal (126) and a corresponding pulse of the window signal (125) is satisfied. The microprocessor (21) identifies a malfunctioning interface circuit (11) by timing the enable signal (124) received from the interface circuit (11).

REFERENCES:
patent: 4622508 (1986-11-01), Matteau et al.
patent: 5162741 (1992-11-01), Bates
patent: 5349668 (1994-09-01), Gladstein et al.

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