Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-05-08
2001-11-06
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S014000, C438S108000, C438S118000
Reexamination Certificate
active
06312962
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a method for COB mounting of electronic chips on a circuit board by contact connection of connecting wires and substantially whole-area adhesive bonding of a chip housing.
In a method for COB (Chip on Board) mounting, the electronic chips are fixed directly on a circuit board (PCB—Printed Circuit Board), subsequently contact-connected by bonding and finally enclosed by a covering compound. The COB method is used, inter alia, in the mounting of memory modules (SIMM, DIMM, etc.). In that case, generally two or more individual chips are mounted on a circuit board.
The method has the advantage of obviating following steps that are usually required, namely the mounting of chips which have already been provided with housings on the circuit board and the soldering of connections. However, the consequence thereof is that, in contrast to the conventional component-mounting methods, the chips can only be tested, or written to in the case of memory modules, in the completely mounted state. If such a chip is defective or fails, which is often not noticed until after an artificial aging process (so-called burn-in process), it is generally very difficult and costly to remove that chip again from the circuit board and replace it with a new specimen. Moreover, the circuit board and, in particular, the conductor tracks can be damaged as a result.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for COB mounting of electronic chips on a circuit board, which overcomes the hereinafore-mentioned disadvantages of the heretofore-known methods of this general type and in which a risk of damage to the circuit board in the event of defective chips or modules being replaced is substantially reduced.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for COB mounting of electronic chips on a circuit board, which comprises partially adhesively bonding a chip on a circuit board for permitting the chip or the module to be contact-connected and removed again without damage to the circuit board; contact-connecting connecting wires between the chip and the circuit board; performing electronic tests or programmings on the chip or module; and fully adhesively bonding and encapsulating the chip with given functionality and substantially whole-area adhesively bonding a housing for the chip, in a manner required for use of the circuit board.
It has been shown, surprisingly, that if the housing is subject to partial adhesive bonding with a strength which suffices for contact connection, it is nevertheless possible in almost all cases to detach the chip or the module again from the circuit board without any damage.
In accordance with another mode of the invention, the adhesive is applied in particular in the form of tracks of adhesive along those edges of the chip at which the connecting wires of the chip are to be connected to the circuit board.
In accordance with a further mode of the invention, the adhesive for the partial adhesive bonding is preferably a thermoplastic adhesive tape or a UV adhesive tape which is ideally adhesive on both sides.
In accordance with a concomitant mode of the invention, the adhesive for the partial adhesive bonding or temporary adhesive bonding can be reused after removal of the chip.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for COB mounting of electronic chips on a circuit board, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
REFERENCES:
patent: 5169056 (1992-12-01), Reele et al.
patent: 5182853 (1993-02-01), Kobayashi et al.
Munch Thomas
Pohl Jens
Wutz Oliver
Greenberg Laurence A.
Infineon - Technologies AG
Lerner Herbert L.
Niebling John F.
Stemer Werner H.
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