Method for clocking functional units in one cycle by using a sin

Details Method for clocking functional units in one cycle by using a sin Method for clocking functional units in one cycle by using a sin

1992-07-31

1996-02-27

Lee, Thomas C.

Boots, shoes, and leggings

3642715, 3642712, 3642714, 364DIG1, G06F 112

Patent

active

054955963

ABSTRACT:
A method and circuit providing for an accurate sampling of data on a high speed bus in a computer system. Utilizing a single clock source, functional units that are capable of supporting two clock input sources, and a routing technique that provides for a receiving unit to be clocked prior to a transmitting unit, data transfer can occur reliably and economically on a high speed bus. Synchronization within a particular unit is accomplished by providing serial edge-triggered registers that are triggered by the respective clock inputs.

REFERENCES:
patent: 4827401 (1989-05-01), Hrustich et al.
patent: 5247656 (1993-09-01), Kabuo et al.
patent: 5276807 (1994-01-01), Kodama et al.
patent: 5303261 (1994-04-01), Junod et al.

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