Cleaning and liquid contact with solids – Processes – For metallic – siliceous – or calcareous basework – including...
Reexamination Certificate
2001-12-10
2004-01-13
Markoff, Alexander (Department: 1746)
Cleaning and liquid contact with solids
Processes
For metallic, siliceous, or calcareous basework, including...
C134S001300, C134S019000, C134S902000, C438S906000
Reexamination Certificate
active
06676764
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a method for fabricating a semiconductor device, and more particularly to a method for cleaning a substrate in a selective epitaxial growth (SEG) process.
2. Description of the Background Art
According to high integration of a semiconductor device, a line width of a circuit pattern has been gradually decreased. In addition, various processes have been developed to obtain excellent device properties. Especially, a number of processes relating to a contact process have been suggested to improve efficiency of the operation.
Although the line width of the pattern is miniaturized, a contact between an upper pattern and a lower pattern may not be stabilized. In the case that a contact resistance is increased between the upper pattern and the lower pattern, a high-speed operation cannot be achieved. There are therefore increasing demands for a new contact process. Here, a representative example of the new contact processes is a self aligned contact (SAC) process which has been applied to fabrication of a memory device over 256M.
The SAC process will not be explained in detail. However, a semiconductor device using the SAC process obtains a stabilized contact between an upper pattern and a lower pattern, but does not restrict increase of contact resistance of the patterns.
In general, polysilicon is used as a contact plug material. A silicon substrate and a polysilicon contact plug consist of the same material, and thus a contact resistance is presumed to be low between the silicon substrate and the polysilicon contact plug in a preferable contact interface state. However, the contact resistance is very high between the silicon substrate and the polysilicon contact plug because a natural oxide film formed on the silicon substrate and residues are positioned between the silicon substrate and the polysilicon contact plug in the contact process.
On the other hand, it is possible to restrict increase of the contact resistance by depositing polysilicon for a contact plug directly after forming a contact hole according to a wet etching process. However, in a state where the size of the contact hole is considerably decreased, the contact resistance is still increased due to a reduced contact area.
In order to restrict increase of the contact resistance resulting from the reduced contact area, a method for using a silicon epitaxial layer as a contact plug has been disclosed according to an SEG process. The SEG process has been applied to various fields, such as shallow junction formation, element isolation process and contact plug formation.
So as to form a silicon epitaxial layer contact plug according to the SEG process, the surface of the silicon substrate should be cleaned before growing the silicon epitaxial layer. The surface state of the silicon substrate before the growth of the silicon epitaxial layer is operated as a main vector deciding a physical property of the silicon epitaxial layer.
Accordingly, in the SEG process, the surface of the silicon substrate is cleaned in situ in a chamber before growing the silicon epitaxial layer. Exemplary in-situ surface cleaning processes include a bake process using a cleaning gas such as H
2
, HCl and Cl
2
, and a vacuum thermal treatment. The H
2
bake process is generally used.
However, the cleaning process of the silicon substrate is required to be performed at a high temperature over 750° C., which makes it difficult to obtain good device properties.
In more detail, the cleaning process of the silicon substrate requires the highest temperature in the SEG process, generally a temperature over 800° C. Even an ultrahigh vacuum chemical vapor deposition process using the lowest temperature among the SEG processes requires a high temperature over 750° C. When a high temperature process is performed over 750° C., the surface of the substrate is stably cleaned, but the doping density of a junction region is varied to deteriorate the device property. Thus, the conventional in-situ surface cleaning process requires a process temperature over 750° C., thereby rendering it difficult to improve the device properties.
On the other hand, deterioration of the device property due to the cleaning process can be prevented by lowering the process temperature. However, the surface of the silicon substrate is cleaned according to a chemical reaction, and therefore cleaning efficiency is sharply reduced at a temperature below 750° C. Moreover, the cleaning time is increased exponentially as temperature decreases.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method for cleaning a substrate in a selective epitaxial growth process which can lower substrate temperature, preventing deterioration of a device property.
Another object of the present invention is to provide a method for cleaning a substrate in a selective epitaxial growth process which can prevent a device property from being deteriorated due to a substrate cleaning process.
In order to achieve the above-described objects of the present invention, there is provided a method for cleaning a substrate in a selective epitaxial growth process wherein a high temperature heating element is aligned in a silicon epitaxial layer growth chamber, separately from the substrate, a cleaning gas inserted into the chamber is decomposed in an atom or radical state having high reactivity in a gas phase according to heat generation of the high temperature heating element, and diffused into the substrate, and a substrate cleaning reaction is performed at a substrate temperature ranging from 400 to 600° C.
The high temperature heating element is formed in a filament shape, and consists of a heat resistance metal such as tungsten or tantalum, precious metal material, or non-metal material such as SiC or graphite. Here, the high temperature heating element generates heat at a temperature ranging from 1000 to 2000° C., and is aligned separately from the substrate by 1 to 10 cm.
The cleaning gas is selected from the group consisting of H
2
, HCl and Cl
2
. In the substrate cleaning reaction, a pressure is adjusted between 0.1 and 100 mTorr.
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Hynix / Semiconductor Inc.
Ladas & Parry
Markoff Alexander
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