Method for cleaning a semiconductor wafer

Details Method for cleaning a semiconductor wafer Method for cleaning a semiconductor wafer

2007-04-09

2009-08-25

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

C438S906000, C257SE21228, C134S001300

Reexamination Certificate

active

07579253

ABSTRACT:
Bottom electrodes of stacked capacitor DRAM cells are formed by depositing a metal layer on the side walls of trenches within a hard mask layer, which serves as a mold for the bottom electrode elements. Prior to depositing the hard mask layer a sacrificial first metal layer is disposed, which results in an electrically conductive surface on the semiconductor wafer. The mask layer is wet-etched to release the bottom electrode as free standing elements on the semiconductor surface. Using the conductive path provided by the first and the second metal layers, the bottom electrodes are polarized in a cleaning liquid bath during a wafer drying process. The generated repulsive electric field overcomes the attractive forces between the neighboring bottom electrode elements induced due to capillary effects of the liquids used for etching and cleaning.

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