Boots – shoes – and leggings
Patent
1986-03-10
1988-06-14
Lall, Parshotam S.
Boots, shoes, and leggings
371 10, G06F 1120
Patent
active
047516569
ABSTRACT:
A method of assigning replacement rows and colums in a two dimensionally redundant array in which if the number of failures along a row exceeds the number of remaining redundant columns, then replacing that row with one of the redundant rows. The process is repeated in the opposite direction with the number of remaining redundant rows and columns being properly decremented. The process of reversing directions continues until the above condition is no longer satisfied.
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Stanley E. Schuster, "Multiple Word/Bit Line Redundancy for Semiconductor Memories", IEEE Journel of Solid State Circuits, vol. sc-13, No. 5, Oct. 1978, pp. 698-703.
Teradyne
Megatest
"Testing System for Redundant Memory", 1982 IEEE Test Conf., pp. 240-244, T. Hayasaka, K. Shimortori & K. Okada.
Conti Dennis R.
Dewar David R.
Fonseca Robert
Wood Robert R.
International Business Machines - Corporation
Lall Parshotam S.
Trans V. N.
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