Method for charge enhanced defect breakdown to improve yield and

Details Method for charge enhanced defect breakdown to improve yield and Method for charge enhanced defect breakdown to improve yield and

1996-11-15

1998-09-08

Chaudhari, Chandra

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Electrical characteristic sensed

438 17, H01L 2166

Patent

active

058044590

ABSTRACT:
According to the present invention, an improved method for locating particle contamination during the integrated circuit manufacturing process is disclosed. The integrated circuit wafer is grounded and then exposed to an electron beam to create an enhanced electrical potential in any conducting or semi-conducting particles embedded in the layered wafer. The embedded particle will begin to accumulate an electrical charge and will reach a certain electrical potential based on the size and composition of the particle as well as the length of exposure to the electron beam. After a sufficient charge has been accumulated in the embedded particle, the wafer is subjected to burn-in testing. Since the particles embedded in the wafer have been previously exposed to the electron beam, the standard voltages applied during burn-in testing will force a certain number of embedded particles to suffer accelerated breakdown. After the defects have occurred and have been located, on-chip fuses can be used to re-route the circuits. As a final step, the wafer is annealed to remove any residual charge in any remaining particle defects not found by the present invention.

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patent: 5410122 (1995-04-01), Su et al.
patent: 5502010 (1996-03-01), Nadahara et al.
patent: 5516369 (1996-05-01), Lur et al.
patent: 5519193 (1996-05-01), Freiermuth et al.

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