Oscillators – With frequency calibration or testing
Reexamination Certificate
1999-10-08
2001-01-16
Mis, David (Department: 2817)
Oscillators
With frequency calibration or testing
C331S014000, C331S016000, C331S017000, C331S057000, C331S17700V, C331S179000
Reexamination Certificate
active
06175282
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a device and method for calibrating an oscillation frequency versus a control voltage characteristic in a voltage controlled oscillator (VCO), wherein the oscillation frequency is changed by the control voltage.
BACKGROUND OF THE INVENTION
FIG. 9
is a basic circuit diagram of a phase locked loop (PLL) circuit
30
using a VCO
20
. In the VCO
20
, an oscillation frequency fo of an output signal line
42
can be changed by a control voltage Vc input, that is, a control voltage line
46
. Generally, in the PLL circuit
30
, a phase frequency comparator
26
detects a phase difference between a signal (fo/N) obtained by dividing the oscillation frequency fo output from the VCO
20
by N with a variable frequency divider
22
and a signal (fi/D) obtained by dividing a reference frequency fi input from an input signal line
44
by D with a variable frequency divider
24
. To eliminate this phase difference, the control voltage Vc is fed back to the VCO
20
through a charge pump
32
.
In this feedback loop, however, if an initial value of control voltage Vc of the VCO
20
or an initial oscillation frequency of the VCO
20
is far from a target frequency ft whose minimum value is ft_L and whose maximum value is ft_H, it will cause a problem that a frequency of an output signal does not correspond with that of an input signal, that is, a problem of unlocking of the PLL. Therefore, a range of Vc (the minimum value is Vclamp_L and the maximum value is Vclamp_H) is controlled in a clamp circuit
34
or the like so that an initial value of the control voltage Vc is not far from the predetermined range. In a conventional method, voltage is corrected in a charge pump
32
so as to oscillate in the middle frequency of the predetermined frequency range when control voltage Vc is the middle of its voltage range.
However, as shown by a characteristic curve in
FIG. 10
, even if voltage is calibrated only with the charge pump
32
, a clamp range (Vclamp_L~Vclamp_H) of the control voltage Vc does not necessarily cover a whole range of target frequency ft (ft_L~ft_H). In the circuit, only the charge pump
32
in the feedback loop can control oscillation frequency fo, therefore, if a characteristic curve of the VCO
20
goes into a too-fast zone or to too-slow zone due to such as process variation, VCO
20
can not oscillate in the required frequency.
As shown by a characteristic curve in
FIG. 10
, if the VCO
20
has a nonlinear characteristic, the VCO
20
's response can be changed according to its operating point. Therefore, the locking time of the PLL varies widely. Moreover, the clamp voltage can be changed by itself. Therefore, considering all these factors, it is necessary to set the most suitable oscillation characteristic of the VCO
20
by adjusting an operating point at the maximum or the minimum frequency (ft_L, ft_H) of the target frequency ft.
Therefore, it is an object of the present invention to calibrate an oscillation frequency versus a control voltage characteristic in a VCO so that the VCO can oscillate in a target frequency securely within a control voltage range.
SUMMARY OF THE INVENTION
Accordingly, according to a first aspect of the invention, a method is provided for calibrating an oscillation frequency versus a control voltage characteristic of a voltage controlled oscillator (VCO). The method includes performing a calibration to establish an oscillation frequency of the VCO at a maximum target frequency value when a control voltage input to the VCO reaches a predetermined reference voltage, and then verifying that the control voltage is within a predetermined operating range when the oscillation frequency is established at a minimum target frequency value.
Preferably, the calibration is performed by automatically setting a calibration value within the VCO. The calibration value is preferably set by initially providing a calibration value, then altering the calibration value incrementally until the control voltage reaches the predetermined reference voltage.
According to another aspect of the invention, a method is provided for calibrating an oscillation frequency versus a control voltage characteristic in a voltage controlled oscillator (VCO) used in a phase-locked loop (PLL) circuit in which a control voltage is fed back to the VCO to eliminate a phase difference between a) a signal obtained by dividing the output frequency signal of the VCO signal by a divide ratio N and b) a signal obtained by dividing a reference frequency input signal by a divide ratio D. According to this aspect of the invention, the method includes selecting divide ratios N and D such that the oscillation frequency is established at a maximum target frequency value; initializing an oscillation frequency versus a control voltage characteristic at a minimum value of a control voltage while maintaining the oscillation frequency at the maximum target frequency value; and while maintaining the oscillation frequency at the maximum target frequency value, setting a calibration value to increase the control voltage from the minimum value to a predetermined reference voltage, thereby calibrating the oscillation frequency versus control voltage characteristic of the VCO. Preferably, after setting the calibration value, divide ratios N and D are selected such that the oscillation frequency is established at a minimum target frequency value, and the control voltage is verified to be within an operating range.
According to a further aspect of the invention, an automatically calibrated phase locked loop (PLL) circuit including a voltage controlled oscillator (VCO) is provided. The PLL circuit invention includes a voltage controlled oscillator (VCO) arranged in a phase-locked loop (PLL), wherein the VCO provides an oscillation frequency as output, and the oscillation frequency is phase compared in proportion to a reference frequency to provide a control voltage as a feedback input to said VCO for controlling the oscillation frequency. In addition, the PLL circuit invention includes a calibration controller which provides a calibration value to the VCO to control an oscillation frequency versus control voltage characteristic of the VCO, wherein the calibration controller automatically adjusts the calibration value such that the oscillation frequency is established either at a minimum target frequency value or at a maximum target frequency value when the control voltage reaches a predetermined reference voltage.
REFERENCES:
patent: 3694766 (1972-09-01), Boelke
patent: 5382922 (1995-01-01), Gersbach et al.
patent: 5408196 (1995-04-01), Sempel et al.
International Business Machines - Corporation
Mis David
Neff Daryl K.
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