Method for calibrating a multi-bit digital-to-analog...

Details Method for calibrating a multi-bit digital-to-analog... Method for calibrating a multi-bit digital-to-analog...

2004-09-13

2009-10-20

Pham, Chi H (Department: 2416)

Coded data generation or conversion

Converter calibration or testing

C341S115000, C702S107000

Reexamination Certificate

active

07605728

ABSTRACT:
In a method for calibrating a multi-bit DAC intended, particularly, for application in high-speed and high-resolution ADCs, such as Σ Δ ADCs, and comprising a number of DAC cells, apart from the number of DAC cells applied in the multi-bit DAC for conversion, an additional DAC cell is provided, which can be interchanged with each of the other DAC cells in order to switch each DAC cell successively from the multi-bit DAC into a calibration circuit to calibrate said DAC cell without interrupting the conversion. The calibration circuit includes means for measuring errors in the DAC cell under calibration and means for correcting said DAC cell.

REFERENCES:
patent: 5646619 (1997-07-01), Daubert et al.
patent: 5955980 (1999-09-01), Hanna
patent: 6507296 (2003-01-01), Lee et al.
Baird R T et al: “A Low Oversampling Ratio 14-B 500-KHZ Deltasigma . . . ”; IEEE Journal of Solid-State Circuits; IEEE Inc. New York, US; vol. 31, No. 3; Mar. 1, 1996; pp. 312-320.

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