Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2001-11-23
2003-12-02
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
Reexamination Certificate
active
06656772
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a method for tape automated bonding inner leads of a tape to bond pads on an IC chip without bumps and structures formed and more particularly, relates to a method for bonding inner leads that are formed in a trapezoidal cross-section to bond pads on an IC die formed in a tapered opening of a dielectric layer in a self-aligned manner and packages formed by the method.
BACKGROUND OF THE INVENTION
Techniques of using an automated tape bonding process in packaging integrated circuit chips have been developed. The technique is used to replace other lead frame wire bonding methods used in packaging integrated circuit chips.
In a tape bonding process, an integrated circuit chip is directly bonded to a foil-type lead frame that is usually less than 0.5 mm in thickness. The technique is also referred to as tape automated bonding or TAB. In a TAB process, a bare copper, a gold or tin plated copper or a copper/plastic laminated tape is first prepared by etching leads into it at positions corresponding to the gold plated bumps over aluminum bonding pads on an integrated circuit chip. The tape is then fed into an inner lead bonder, which is an apparatus equipped with a thermode, i.e. a heated instrument that presses the chip and the tape together. The inner end of the leads are bonded to the bumps on the integrated circuit chip by compressing them under the heated thermode in a single operation. The integrated circuit chip and bonded leads can then be excised out of the tape for connection to a circuit board.
As shown in
FIG. 1
, a length of copper tape
10
is loaded into an inner lead bonder machine between thermode
12
and anvil
14
. An integrated circuit chip
16
is provided and positioned on the flat top
18
of anvil
14
with gold tipped or solder tipped contact bumps
20
. Contact bumps
20
face upward. An electric resistance heating coil
22
is used to heat thermode
12
of the inner lead bonder. A suitable copper tape used in this process is a 0.0028 inch thick non-plated copper of 2 oz. weight supplied by the Minnesota Mining and Manufacturing Co. A gold or tin plated copper tape, or a copper/plastic laminated tape may also be used.
In the conventional tape automated bonding technique, contact bumps
20
are made by first building up an aluminum pad to about 1200 nm in height. The aluminum contact bump is then covered with sputtered layers of titanium and an alloy of tungsten. Each layer is about 200~300 nm thick and has a combined thickness of about 500 nm. A thin layer of about 400 nm of gold is then sputtered on top of the contact bump. In a final processing step, a gold layer of 0.001 inch (or 25.4 &mgr;m) in thickness is plated on top of the sputtered gold layer.
Thermode
12
is then lowered to contact tape
10
and integrated circuit chip
16
.
FIG. 2
shows thermode
12
in a closed position wherein etched finger leads
24
in tape
10
are pressed against gold tipped or solder tipped bumps
20
between thermode surface
26
and anvil surface
18
. The usual time, temperature, and bonding pressure used are 0.8 sec, 525° C., and 200 gms/bump respectively. However, it is to be understood that bonding pressure can be adjusted based on the heat input from heating coil
22
and the time desired for each particular bonding process.
The present tape automated bonding process requires the additional step of forming solder bumps, or the gold plated solder bumps over aluminum bond pads situated on an IC die. In some other instances, anisotropic conductive film (ACF) may also be required for the bonding process. Either the bumping process or the ACF bonding process is costly and requires an intermediate process step and thus, affects the throughput and yield of the tape to chip bonding process. Moreover, the bumping process further limits the achievement of a fine pitch interconnection structure.
It is therefore an object of the present invention to provide an inner lead bonding method that does not have the drawbacks or the shortcomings of the conventional TAB method.
It is another object of the present invention to provide an inner lead bonding method in which a lead frame can be bonded to an IC die without requiring the formation of bumps on the die.
It is a further object of the present invention to provide a method of bonding a lead frame to an IC die in a self-aligned manner.
It is another further object of the present invention to provide an inner lead bonding method wherein a plurality of inner leads is formed in a trapezoidal cross-section.
It is still another object of the present invention to provide an inner lead bonding method in which bond pads on an IC die are exposed in tapered openings formed in a dielectric material layer on top of the die.
It is yet another object of the present invention to provide an inner lead bonding method in which heat and pressure are used to bond inner leads of a TAB film to bond pads on an IC die.
It is still another further object of the present invention to provide an inner lead bonding method in which heat, pressure and vibration are used to bond inner leads of a TAB film to bond pads on an IC die.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method for bonding inner leads of a TAB or COF film to bond pads of an IC die without bumps and structures formed by the method are disclosed.
In a preferred embodiment, a method for bonding inner leads of a film substrate to bond pads of an IC die without bumps can be carried out by the operating steps of providing a base film that has a first plurality of inner leads formed of a first electrically conductive metal thereon extending inwardly toward a center of the base film, the first plurality of inner leads is formed in a trapezoidal cross-section that has a first height, a top width and a bottom width, the top width is smaller than the bottom width; providing an IC die that has a second plurality of bond pads formed of a second electrically conductive metal along and extending to an outer periphery of the IC chip; coating a top surface of the IC chip with an insulating material layer that has a second plurality of openings formed therein exposing the second plurality of bond pads, each of the second plurality of openings has a second height, a top width and a bottom width, the top width is larger than the bottom width, the bottom width of the second plurality of openings is larger than the top width of the first plurality of inner leads, the second height of the second plurality of openings is smaller than the first height of the first plurality of inner leads; positioning the base film and the IC chip in a face-to-face relationship such that each of the first plurality of inner leads is received by a corresponding one of the second plurality of openings; and pressing and heating the base film and the IC chip together until each of the first plurality of inner leads is bonded to a corresponding one of the second plurality of bond pads.
The method for bonding inner leads of a film substrate to bond pads of an IC die without bumps may further include the step of forming the base film of a dielectric material selected from the group consisting of polyimide, polyester, benzo-cyclo-butene, PMMA and epoxy. The method may further include the step of forming the first plurality of inner leads of Cu, or the step of forming the first plurality of inner leads to a first height of at least 15 &mgr;m, or the step of forming the second plurality of openings to a second height of less than 15 &mgr;m. The method may further include the step of forming the second plurality of bond pads of a material selected from the group consisting of Al, Cu, Au, Ag, Co, Ti and alloys thereof. The method may further include the step of filling a gap formed in-between the first plurality of inner leads and the second plurality of openings with an underfill material, or the step of forming the insulating material layer with polyimide or benzo-cyclo-butene. The method may further include the step of forming a dielectric film on t
Coleman W. David
Industrial Technology Research Institute
Tung & Associates
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