Method for balancing molding flow during the assembly of...

Details Method for balancing molding flow during the assembly of... Method for balancing molding flow during the assembly of...

2007-03-27

2007-03-27

Clark, S. V. (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

C438S110000

Reexamination Certificate

active

11140054

ABSTRACT:
A method for balancing molding flow during the assembly of semiconductor packages with defective carrying units includes providing a chip carrier, which includes a number of good carrying units and at least a defective carrying unit. Then, a number of chips are attached to the good carrying units of the chip carrier, and a chip-imitative glue is formed on the defective carrying unit of the chip carrier. Next, a molding compound is formed on the chip carrier via molding to seal the chips and the chip-imitative glue, thereby improving the balance of molding flow.

REFERENCES:
patent: 6087202 (2000-07-01), Exposito et al.
patent: 6544814 (2003-04-01), Yasunaga et al.
patent: 6558975 (2003-05-01), Sugino et al.
patent: 6780670 (2004-08-01), Park
patent: 6933173 (2005-08-01), Yunus
patent: 2004/0262776 (2004-12-01), Lebonheur et al.

Affiliated with

Also associated with

Rating

Method for balancing molding flow during the assembly of... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for balancing molding flow during the assembly of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for balancing molding flow during the assembly of... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3762635