Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data framing
Reexamination Certificate
1999-12-30
2004-04-13
Dharia, Rupal (Department: 2141)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data framing
C700S101000, C700S019000, C700S021000, C710S121000, C710S120000
Reexamination Certificate
active
06721799
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the field of data communications, and more particularly, to the field of serial communications bus controllers and microcontroller that incorporate the same.
CAN (Control Area Network) is an industry-standard, two-wire serial communications bus that is widely used in automotive and industrial control applications, as well as in medical devices, avionics, office automation equipment, consumer appliances, and many other products and applications. CAN controllers are currently available either as stand-alone devices adapted to interface with a microcontroller or as circuitry integrated into or modules embedded in a microcontroller chip. Since 1986, CAN users (software programmers) have developed numerous high-level CAN Application Layers (CALs) which extend the capabilities of the CAN while employing the CAN physical layer and the CAN frame format, and adhering to the CAN specification. CALs have heretofore been implemented primarily in software, with very little hardware CAL support. Consequently, CALs have heretofore required a great deal of host CPU intervention, thereby increasing the processing overhead and diminishing the performance of the host CPU.
Thus, there is a need in the art for a CAN hardware implementation of CAL functions normally implemented in software in order to offload these tasks from the host CPU to the CAN hardware, thereby enabling a great savings in host CPU processing resources and a commensurate improvement in host CPU performance. One of the most demanding and CPU resource-intensive CAL functions is message management, which entails the handling, storage, and processing of incoming CAL/CAN messages received over the CAN serial communications bus and/or outgoing CAL/CAN messages transmitted over the CAN serial communications bus. CAL protocols, such as DeviceNet, CANopen, and OSEK, deliver long messages distributed over many CAN frames, which methodology is sometimes referred to as “fragmented” or “segmented” messaging. The process of assembling such fragmented, multi-frame messages has heretofore required a great deal of host CPU intervention. In particular, CAL software running on the host CPU actively monitors and manages the buffering and processing of the message data, in order to facilitate the assembly of the message fragments or segments into complete messages.
Based on the above and foregoing, it can be appreciated that there presently exists a need in the art for a hardware implementation of CAL functions normally implemented in software in order to offload these tasks from the host CPU, thereby enabling a great savings in host CPU processing resources and a commensurate improvement in host CPU performance.
The assignee of the present invention has recently developed a new microcontroller product, designated “XA-C3”, that fulfills this need in the art. The XA-C3 is the newest member of the Philips XA (e
X
tended
A
rchitecture) family of high performance 16-bit single-chip microcontroller. It is believed that the XA-C3 is the first chip that features hardware CAL support.
The XA-C3 is a CMOS 16-bit CAL/CAN 2.0B microcontroller that incorporates a number of different inventions, including the present invention. These inventions include novel techniques and hardware for filtering, buffering, handling, and processing CAL/CAN messages, including the automatic assembly of multi-frame fragmented messages with minimal CPU intervention, as well as for managing the storage and retrieval of the message data, and the memory resources utilized therefor.
The present invention relates to a method for writing a three-state semaphore code to a given message buffer to indicate an access status of the given message buffer. The application (software) running on the CPU can then read this three-state semaphore code to determine whether the given message buffer is ready for the CPU to read, whether the given message buffer is presently being accessed by the DMA engine (and therefore is not ready for the CPU to read), or whether the given message buffer is presently being read by the CPU. In this manner, the integrity of the data stored in the given message buffer is ensured, even if the DMA engine accesses the given message buffer while a CPU read is in progress.
SUMMARY OF THE INVENTION
The present invention encompasses a method for use in a CAN device (e.g., a CAN microcontroller) that includes a processor core, for automatically transmitting an acknowledge message. The method includes the steps of receiving a frame of a multi-frame fragmented message, and automatically transmitting an acknowledgment message without requiring any intervention of the processor core, in response to the receiving step. The automatically transmitting step is preferably performed by hardware external to the processor core, e.g., a CAN/CAL module of the CAN device.
In a preferred embodiment, the method includes the steps of setting up a first message object having an object number n as a receive message object, enabling the receive message object, setting up a second message object having an object number n+1 as a transmit message object corresponding to the receive message object, storing the acknowledgment message in a response message buffer associated with the transmit message object, receiving a frame of a multi-frame fragmented message, acceptance filtering the received frame to determine that the received frame matches the enabled receive message object, enabling the transmit message object, and automatically transmitting the acknowledgment message, without requiring any intervention of the processor core.
In a specific implementation, the acknowledgment message includes an acknowledgment byte defined by a governing CAL protocol, e.g., the CANopen protocol, and the method further includes the step of copying a toggle bit included in the received frame into a corresponding bit position of the acknowledgment byte prior to the automatically transmitting step.
The present invention, in another of its aspects, encompasses a CAN device, e.g., a CAN microcontroller, that implements the above-described methods.
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patent: 5323385 (1994-06-01), Jurewicz et al.
patent: 5502818 (1996-03-01), Lamberg
patent: 5574848 (1996-11-01), Thomson
patent: 5675830 (1997-10-01), Satula
patent: 5854454 (1998-12-01), Upender et al.
patent: 6122713 (2000-09-01), Huang et al.
patent: 6252851 (2001-06-01), Siu et al.
patent: 6363083 (2002-03-01), Spielbauer et al.
Siemens Microelectronics, Inc: “Control area Network” Internet, 'Online! 1998, XP002156911 Retrieved from the Internet p. 56 or p. 58.
Philips “XA-C3 Microcontroller” Internet, 'Online! Jan. 25, 2000, XP002156912 Retrieved from the Internet. The whole document.
Dharia Rupal
Koninklijke Philips Electronics , N.V.
Mirza Adnan
Waxler Aaron
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