Method for automated deployment of a software program onto a mul

Boots – shoes – and leggings

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364DIG1, 3642813, 3642844, 3642817, 3642818, 3642816, G06F 940, G06F 1582

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active

054189535

ABSTRACT:
A method is employed for pre-assignment and pre-scheduling of tasks that enables allocation across multiple physical processors arranged in a variety of architectures. The method comprises the steps of: constructing a DFG of tasks to be performed to provide a solution for a problem; determining cost values for each task and the overall problem, such cost values taking into account a target multiprocessor architecture and factors such as elapsed task execution times. The method pre-assigns the tasks to logical processors and assures that inter-dependent tasks are executable by logical processors that are within required communications delay criteria of each other. The assigning action attempts to arrive at a minimal cost value for all tasks comprising the problem. The pre-assigned tasks are then pre-scheduled based upon a performance criteria and are converted to machine code. The machine code is then deployed to physical processors in the target multi-processor architecture. The deploying action maps the logical processors' pre-assigned programs (comprising assigned tasks) onto physical processors, using data regarding the multi-processor architecture and the current utilization of the physical processors in the architecture, all while assuring that inter-dependent tasks are mapped so as to fulfill interprocessor communication delay criteria.

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"Hardware Mapping and Module Selection in the Hyper Synthesis System" by Chi-Min Chu, Memorandum No. UCB/ERL M92/46, May, 1992, Electronics Research Laboratory, College of Engineering, Univ. of Calif., Berkeley.

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